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SBIR/STTR

SpaceVPX Switch-Controller, Phase I

Active Technology Project

Project Introduction

Crossfield Technology proposes a SpaceVPX (VITA 78) Switch-Controller Module implemented in a state-of-the-art Field Programmable Gate Array (FPGA) System on Chip (SoC). The System Controller and Chassis Management Controller (ChMC) functions will be implemented in the embedded ARM processors and the Control and Data Switches will be implemented in the FPGA fabric. Crossfield proposes to use an FPGA SoC implemented in FinFET technology for the design, and to assess the radiation hardness of this FPGA SoC as part of the program. The FPGA SoC integrates sufficient logic elements and high-speed transceivers to implement a 16-port RapidIO Data Switch. Crossfield proposes to use 3D XPoint memory or MRAM to provide radiation hardness of the memory system. For space applications requiring more robust radiation hardness, the design can be ported to the radiation-hardened multi-core General Purpose Processor (GPP) under development by NASA plus one or more radiation-hardened FPGAs. More »

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Project Duration

Technology Maturity (TRL)

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