The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, high-capacity memory systems to maximize data storage and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar).Three-dimensional ICs, after a long wait, are now a reality. The first mainstream products are 3D memory cubes that offer manifold improvements in size, capacity, speed, and power. Unfortunately, none of these are ready for space. The purpose of this research and development is to pursue a non-volatile, 3D memory module that can meet the high-reliability requirements of space and interface to the High Performance Space Computer (HPSC) using a high-speed serial interface. Development will include fabricating a 3D memory cube and RTL for a FPGA based memory controller which will eventually be migrated to a rad-hard ASIC. The FPGA based platform will integrate a 3D memory cube to produce a 3D memory module prototy
Optimization of the logic base of a memory cube has not been available for any application. Development of the design tools to achieve better optimization of these logic bases will in turn lead to a broader application base which will benefit not only the users for space applications, but will benefit terrestrial users to help improve the efficiency of their electronics by addressing SWaP issues.
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