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SBIR/STTR

RUSH: A Rad-Hard Unified Scalable Heterogeneous Processing Architecture, Phase I

Completed Technology Project

Project Introduction

RUSH: A Rad-Hard Unified Scalable Heterogeneous Processing Architecture, Phase I
Space presents a challenging environment for computing. Extended development times and radiation tolerance requirements leave hardware performance a decade or more behind the terrestrial state-of-the-art at the time of deployment. Additionally, once deployed, hardware changes are impractical, encouraging a trend towards increased software programmability. However, topside pressure from application advancements are forcing space-based platforms to improve throughput and latency while reducing power consumption. A popular approach to addressing the tension between these requirements is the heterogeneous processing architecture. By providing multiple hardware tools that optimally support a subset of the anticipated workload, a heterogeneous architecture can offer a diverse processing toolset to the application developer. However, programming these systems is extremely challenging because of variations in toolsets and data sharing interfaces. As a result, data sharing and dynamic workload scheduling across heterogeneous architectures is often suboptimal and hindered by poor scalability. Maxentric proposes to solve this problem with RUSH, a heterogeneous processing architecture with a unified programming model for rapid development. RUSH employs a rad-hard multicore processor as a host and an FPGA as an accelerator chip. The RUSH software layer unifies these architectures through an innovative programming model described in the proposal. More »

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This is a historic project that was completed before the creation of TechPort on October 1, 2012. Available data has been included. This record may contain less data than currently active projects.

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