Advanced reconfigurable/reprogrammable communication systems will require use of commercial sub 100 nm electronics. Legacy radiation tolerant circuits fail to provide Single Event Upset (SEU) immunity at speeds greater than 500 MHz. New base level logic circuits have been demonstrated in Phase I that provide SEU immunity for sub 100 nm high speed circuits. A completely new circuit and system approach called Self Recovery Logic (SRL) is proposed for development herein which is able to function at the full speed afforded by the fabrication process and able to tolerate SEU impacts not possible with legacy circuits. Moreover, a truly fault tolerant system is projected to replace Triple Modular Redundancy (TMR) as the on-chip means for fault tolerance. With the proposed building blocks in place, advanced reconfigurable and reprogrammable high speed devices can be implemented. The proposed work herein creates a robust test circuit for fabrication and radiation testing to prove conclusively that SRL is a superior technology and then to create an SRL synthesis library that can be used with commercial synthesis tools to create advanced communication systems.