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SBIR/STTR

Accelerating ATM Optimization Algorithms Using High Performance Computing Hardware, Phase II

Completed Technology Project

Project Introduction

NASA is developing algorithms and methodologies for efficient air-traffic management. Several researchers have adopted an optimization framework for solving problems such as flight scheduling, route assignment, flight rerouting, nationwide traffic flow management (TFM) and dynamic airspace configuration. Computational complexity of these problems have led investigators to conclude that in many instances, real time solutions are computationally infeasible, forcing the use of relaxed versions of the problem to manage computational complexity. The primary objective of the proposed research is to accelerate optimization algorithms that play central roles in NASA's ATM research, by parallel implementation on emerging high performance computing (HPC) hardware. The Phase I R&D effort implemented a Simplex-based Dantzig-Wolfe (DW) decomposition solver that exploits both coarse-grain and fine-grain parallelism in the sub-problem and master iterations of the DW decomposition. The implementation also exploits the sparsity in the problems, to manage both memory requirements and run-times for large-scale optimization problems. This parallel implementation was used to solve a Traffic Flow Management (TFM) problem with 17,000 aircraft (linear program with 7 million constraints), in 15 seconds. The implementation is 30X faster than the exact same code running on the CPU. It is also 16X faster than the NASA's current solution that implements parallel DW decomposition using the GNU Linear Programming Kit (GLPK) on an 8-core computer with hyper-threading. Based on the promising Phase I results, the Phase II R&D effort will explore Mixed Integer Linear Programming (MILP) methods to solve optimization problems arising in the terminal area and on the airport surface, in addition to DW decomposition for the nationwide TFM problem. Phase II work will develop operational prototypes of the algorithm implementations on HPC hardware, and deliver them to NASA for further evaluation. More »

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