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SBIR/STTR

1 Gb Radiation Hardened Nonvolatile Memory Development, Phase I

Completed Technology Project

Project Introduction

1 Gb Radiation Hardened Nonvolatile Memory Development, Phase I
The objective of this effort is to identify, characterize and develop advanced semiconductor materials and fabrication process techniques, and design and produce a Gigabit (GB)-scale high density, radiation hardened (RH), SONOS-based nonvolatile memory (NVM) in a standard, high density CMOS technology with feature sizes approaching the 90nm technology node. Highly reliable, RH SWAP-efficient, high-density NVM provides for the deployment of more capable, flexible and responsive hardware designs leading to improved mission performance and enhanced data storage capability with less system operational complexity and reduced system vulnerability to natural and weapons generated radiation environments. By leveraging state-of-the-art (SOA) commercial NVM technologies and implementing a combination of these elements with the proper memory cell architecture, radiation hardened device design, and advanced fabrication processes, we are confident we can produce a 1Gb RH NVM using currently available CMOS process modules at or below the 90 nm fabrication technology node. The unique materials and process technologies to be investigated in our approach include composite high-k dielectric thin-film oxide materials, shallow trench isolation, atomic layer deposition, p-channel silicon-insulator-nitride-oxide-silicon (SINOS) NVM architecture, and RH CMOS peripheral circuitry. More »

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This is a historic project that was completed before the creation of TechPort on October 1, 2012. Available data has been included. This record may contain less data than currently active projects.

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