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High-Rate Receiver Design, Phase I

Completed Technology Project

Project Introduction

High-Rate Receiver Design, Phase I
We propose an initial architectural and preliminary hardware design study for a high-rate receiver capable of decoding modulation suites specified by CCSDS 413.0-G-1 April 2003 ( and new advanced modulation suites. We propose to detail a design which can provide a throughput of greater than 300 Mbits/sec and 7 bits/sample output. More »

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This is a historic project that was completed before the creation of TechPort on October 1, 2012. Available data has been included. This record may contain less data than currently active projects.