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SBIR/STTR

Configurable Radiation Hardened High Speed Isolated Interface ASIC, Phase I

Completed Technology Project

Project Introduction

Configurable Radiation Hardened High Speed Isolated Interface ASIC, Phase I
NVE Corporation will design and build an innovative, low cost, flexible, configurable, radiation hardened, galvanically isolated, interface ASIC chip set that will reduce power consumption, enable high efficiency power conversion management, highly integrate existing discrete solutions, enable precision isolated data conversion and communication, save weight and footprint and be more immune to radiation than the existing optocoupler technology solution. The proposed chip set configurations will interface with many communication protocols and data signaling applications. This flexible configuration enables variant uses of the silicon, increases circuit and application flexibility, allows protected, isolated interfaces between systems, and increases overall system speed and reliability while reducing complexity. A key challenge is to successfully integrate NVE's commercialized Giant Magneto-Resistive (GMR) based post processing IsoLoopREG technology with radiation hardened or radiation tolerant under-layer circuits. NVE has shipped millions CMOS-based commercial units using this concept. GMR material, configured into magnetically sensitive resistors, is inherently radiation hard. Customers have tested the basic sense element to a dose rate of 1.1E+12 rads(Si)/sec. without failure. NASA Goddard (Robert Reed) tested commercial IsoLoop products to a fluence of 1x107 ions/cm2.and observed no upsets. James Lyke of AFRL/VSEE will advise and assist NVE on the program. More »

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This is a historic project that was completed before the creation of TechPort on October 1, 2012. Available data has been included. This record may contain less data than currently active projects.

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