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SBIR/STTR

High Channel Count Time-to-Digital Converter and Lasercom Processor, Phase I

Completed Technology Project

Project Introduction

A multi-channel FPGA-based time-to-digital converter (TDC) is needed to process the output from single-photon focal plane arrays used in lasercom. Leveraging an existing 64-channel design shown capable of better than 30 ps. time resolution and 256 channels with 120-ps time resolution, scalable 512-channel (threshold) and 1024-channel (objective) TDCs with optional multicore image processor will be developed, which can process and transmit data continuously. In Phase I, leveraging the existing technology, we will demonstrate existing multichannel TDC processors, including several with single-photon avalanche photodiode (SPAD) detectors. After refining the requirements and generating a controlled specification of NASA requirements, we will then design of the High-channel-count Time-to-digital Advanced Processor (HiTAP) module capable of better than gigaphoton per second rates in a first-in/first-out (FIFO) -buffered continuous stream, with the goal of achieving kilo-channel designs capable of gigaphoton count rates. More »

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