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SpaceCubeX: A Hybrid Multi-core CPU/FPGA/DSP Flight Architecture for Next Generation Earth Science Missions

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Project Introduction

SpaceCubeX: A Hybrid Multi-core CPU/FPGA/DSP Flight Architecture for Next Generation Earth Science Missions
This proposal addresses NASAs Earth Science missions and climate architecture plan and its underlying needs for high performance, modular, and scalable on-board processing. The decadal survey era missions are oriented not only to provide consistent observations with the previous generation of missions, but also to provide data to help scientists answer critical 21st century questions about global climate change, air quality, ocean health, and ecosystem dynamics, while adding new capabilities such as low-latency data products for extreme event warnings. Missions such as (P)ACE, HyspIRI, GEO-CAPE, ICESat-II, and ASCENDS are specifying instruments with significantly increased temporal, spatial, and frequency resolutions and moving to global, continuous observations. These goals translate into on-board processing throughput requirements that are on the order of 100-1,000x more than previous Earth Science missions for standard processing, compression, storage, and downlink operations. The team proposes to develop SpaceCubeX: a Hybrid Multi-core CPU/FPGA/DSP Flight Architecture for Next Generation Earth Science Missions to address these needs and enable the next generation of NASA Earth Science missions to effectively meet their goals. Recent studies have shown that in order to realize mission size, weight, area, and power (SWAP) constraints while meeting inter-mission reusability goals, compact heterogeneous processing architectures are needed. In a heterogeneous architecture, general OS support, high level functions, and coarse grained application parallelism are efficiently implemented on multi-core processors, while a co-processor provides mass acceleration of high throughput, fine-grained data parallelism operations, to achieve high performance robustly across many application types. Hybrid architecture development represents a significant departure from traditional homogeneous avionics development and SpaceCubeX provides a structured approach to fundamentally change the avionics processing architecture development process to yield the following benefits: ' Enables selection of the most SWAP efficient processing architecture, with direct impact on mission capabilities, cost, and risk. ' Minimal extensions to integrate new processors, such as the anticipated NASA High Performance Spaceflight Computer (HPSC), reducing time to initiate benchmarking by months. ' Reduces risk due to supply chain disruptions by allowing a user to rapidly compare alternative component selections, quantify the impact, and update the processing architecture. ' Leverages a wide suite of high performance embedded computing benchmarks and Earth science scenarios to ensure robust architecture characterization. ' Utilizes a proven inter-task programming model to facilitate benchmark compilation and experimentation, while being fully interoperable with commercial compilers. SpaceCubeX leverages substantial research investments from NASA, DARPA, and NRO on space based computing, multi-core and FPGA architectures, and software / hardware co-design APIs and focuses them on NASA Earth science missions and applications. The University of Southern California's Information Sciences Institute (USC/ISI) will oversee the effort, leading the development of the architecture and the common API. USC/ISI is teamed with NASA Goddard Space Flight Center, who will assist in architecture development, space applications, and demonstrations, and NASA Jet Propulsion Laboratory who will develop performance benchmarks. The team will use its well-established expertise in these areas to develop a simulation level testbed in year 1 and to implement a bread board proto-type emulation testbed and benchmark performance in year 2, raising the TRL from 3 to 5 in all areas. More »

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