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Advanced Component Technology Program

Proof-of-concept and feasibility demonstrations for an avalanche photodiode/photoelastic modulator-based imaging polarimeter

Completed Technology Project
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Project Description

ALHAT - ETD Autonomous Landing & Hazard Avoidance Tech   Earth Science Technology Office
Building on the successful heritage of JPL's Multiangle SpectroPolarimetric Imager (MSPI), we propose infusing HgCdTe avalanche photodiode (APD) array technology into the MSPI camera architecture. This concept includes a custom readout integrated circuit (ROIC) that demodulates the 42 kHz waveform from a single photoelastic modulator (PEM) by sorting the APD charge pulses into 3 bins associated with each pixel, from which intensity I and Stokes parameters Q and U are derived. This innovation yields superior signal-to-noise performance and extends MSPI polarimetry into the ultraviolet and midwave infrared, enabling characterization of high-altitude hazes and the vertical gradient of droplet sizes near the tops of liquid water clouds. These new capabilities are important because the recent slowdown in global mean surface temperature rise has been linked to stratospheric aerosols, and cloud-top droplet size information helps mitigate biases in microwave retrievals of precipitation rates. MSPI's current dual-PEM approach requires two detector rows at any given wavelength to recover I, Q, and U (confining polarimetry to a few bands), and incurs a noise penalty that requires pixel averaging to improve performance and limits the polarimetric spectral range to the visible through shortwave infrared. The proposed technology eliminates one PEM from each camera, reduces mass, and recovers I, Q, and U at all UV-MWIR wavelengths with just one detector row in each band. We will validate this approach in the laboratory using a small APD array. To demonstrate the feasibility of meeting the speed, noise, and power constraints for a large pushbroom array, we will design and simulate the custom ROIC that performs the on-chip temporal multiplexing, and fabricate and test the critical pixel-level charge-sorting circuit. The entry level of this technology is TRL 2. Our 32-month investigation will advance the overall demodulation approach to TRL 3 and the in-pixel sorting circuit to TRL 4. More »

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