Although Single-Event Latchup (SEL) has proven to be one of the most significant radiation threats for low-cost missions, conventional SEL hardness assurance methods, which involve testing with heavy ions, exceed the budget and technical means of most such missions. This IRAD seeks to develop low-cost screening techniques that provide at least a comparative measure of a component’s or system’s susceptibility to SEL. Performance of Analog-to-Digital and Digital-to-Analog Converters subjected to these screens will be compared and correlated to previously gathered SEL heavy ion data.
SEL is a destructive single-event effect that occurs in parasitic bipolar structures of CMOS microcircuits, which are ubiquitous in satellite electronics. When a charged particle injects a sufficiently large current into the base region of the parasitic structure that the gain exceeds one, resulting high currents can cause failure or damage to the part. Conventional SEL hardness assurance for space missions requires heavy-ion irradiation of a sample of parts representative of flight parts. Often, parts need special preparation for to penetrate deeply enough into the SEL sensitive region for the test to be valid. Such tests can be costly. Moreover, if the parts survive SEL, subsequent testing for latent damage can be time-consuming and costly.
Bounding SEL risk is challenging for low-budget satellite missions. Not only is conventional SEL testing too costly, their budget, schedule and performance requirements often require the use of commercial CMOS, for which no radiation data exist. Moreover, alternative risk assessment works poorly for SEL:
As such, SEL poses a special problem for low-budget missions: The conventional methods for bounding risk are too costly, while alternative methods that often work for nondestructive SEE are ineffective in bounding SEL risk. Low-cost missions need alternative test procedures that can assess, at least qualitatively, susceptibility to SEL of candidate flight parts for low-cost missions.
The objectives of this research include:
For this IRAD, we propose to assess three methods above for predicting component susceptibility to heavy-ion induced SEL and to correlate method results with heavy-ion test results in the radiation test literature.
To save the cost of heavy-ion testing, we will apply these techniques to parts for which we have archival SEL test data—specifically analog-to-digital and digital-to-analog converters (ADCs and DACs). ADCs and DACs are attractive for SEL studies in part because they are difficult to harden against SEL. The Principal Investigator is also familiar with the extant data for SEL susceptibility in ADCs and DACs, having used these parts as part of a previous IRAD to develop Bayesian techniques for SEE hardness assurance.More »
The technology should be beneficial to any low-cost mission seeking to use commercial CMOS technologies. This includes Explorer and Cubesat missions. .
Because any CMOS technology not specifically designed to be hard to SEL is potentially vulnerable, and because CMOS is ubiquitous in flight hardware, this technology should be beneficial to any mission seeking to use commercial CMOS devices. This is particularly true if the project's budget or the part technology do not allow heavy-ion SEE testing. Examples include missions in heliophysics, planetary science and human exploration.
Many commercial space companies are using technologies that would be very difficult to test at conventional heavy-ion accelerators. Some of the techniques being investigated could benefit these companies.
Many government agencies (NOAA, DOD, NRO, etc.) rely on satellite infrastructure. This technology could enable more confident use of advanced commercial technologies that would be difficult to test at conventional heavy-ion accelerators.More »
|Organizations Performing Work||Role||Type||Location|
|Goddard Space Flight Center (GSFC)||Lead Organization||NASA Center||Greenbelt, MD|
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