The objective of this NASA STTR program is to develop single wall carbon nanotube (SWCNT) based ultracapacitors for energy storage devices (ESD) application, using NanoSonic's patented molecular level self-assembly process performed at room temperature. Specifically, we would combine advances in metallic SWCNTs, metal and oxide nanoclusters, and polymeric materials and electrostatic self-assembly (ESA) processes, to enable large-area, low-cost and integrated device manufacturing on rigid and flexible substrates. Such a combination of solution-based thin film deposition approaches to form ultracapacitor based devices and materials offers advantages over conventional high temperature and costly processes such as vacuum processes and vapour-phase deposition, in that very different materials can be incorporated uniformly at room temperature and pressure. We will perform synthesis of SWCNT and other precursors that can be used for ESA processing and transitioned to deposition of two-dimensional patterned materials. Layer by Layer fabrication of multilayered CNT enhanced ultracapacitors leads to the analysis of chemical, physical and optical properties during and after synthesis, and verification of material morphology and response. We will study the cyclic voltammetric (CV) behavior and derive the power density from the inner integrated area. We will also investigate the specific capacitance as a function of discharge current density. From here, NanoSonic and Virginia Tech will develop an equivalent circuit model of the CNT ultracapacitor device for NASA applications. NanoSonic and Virginia Tech will also experimentally validate CNT ultracapacitor performance through extended field test evaluation, and possible testing with industrial partners, and produce first-generation ultracapacitors and energy storage systems for sale.