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SBIR/STTR

Triple3 Redundant Spacecraft Subsystems (T3RSS), Phase I

Completed Technology Project

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Triple3 Redundant Spacecraft Subsystems (T3RSS), Phase I
Redefine Technologies, along with researchers at the University of Colorado, will use three redundancy methods to decrease the susceptibility of a spacecraft, on a mission survivability level, to electronic failures anywhere throughout the spacecraft. By using Field Programmable Gate Array (FPGA) chips, we will analyze the spacecraft-wide benefits of: *triplicating the logic and RAM on-board each subsystem using a Xilinx proprietary Triple Modular Redundancy (TMR) tool; *triplicating the persistent memory storage (i.e. ROM, science data, and flight code) on-board each subsystem using various methods specific for the space environment; and, *triplicating the backup architecture itself, while reducing weight and volume requirements, so subsystem code can run on alternate processors if any component is rendered inoperable due to an electronic failure (radiation, manufacturing, human-error, etc). These three methods of triplication should significantly increase the reliability of non-radiation hardened designs, which should allow commercial off-the-shelf (COTS) processing components to be used as flight critical hardware. The analysis that is performed will predict the total benefit of this approach to any future spacecraft. More »

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This is a historic project that was completed before the creation of TechPort on October 1, 2012. Available data has been included. This record may contain less data than currently active projects.

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