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SBIR/STTR

Rad-Hard and ULP FPGA with "Full" Functionality, Phase I

Completed Technology Project

Project Introduction

Rad-Hard and ULP FPGA with "Full" Functionality, Phase I
Our vision for this NASA proposal is to develop a rad-hard and ultra low power (ULP) reconfigurable FPGA that will have More »

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Technology Maturity (TRL)

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This is a historic project that was completed before the creation of TechPort on October 1, 2012. Available data has been included. This record may contain less data than currently active projects.

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