Asynchronous A/D Converter for In Situ Instruments Operating under Extreme Environments

This ESI project is to investigate and develop an innovative yet low-TRL technology that has the high-payoff potential to advance future space electronics and promote them to higher TRLs. Specifically, the proposed asynchronous analog-to-digital (A/D) converter research addresses Topic 2 – Technologies for In Situ Instruments in the STRO-ESI solicitation. In NASA’s Space Technology Roadmaps, this project primarily addresses 8.1.2 Electronics element and 8.3 In-Situ Instruments/Sensors element in Technology Area 08 Science Instruments, Observatories, and Sensor Systems Roadmap. Space instruments taking in situ measurements must have the capability to operate in extreme environments, e.g., cryogenic temperature and heavy radiation. While external protection mechanisms like “warm boxes” are currently utilized to isolate the microelectronic circuits incorporated by these instruments from the drastic environmental temperature swings in order to avoid system malfunction, they induce additional mass, volume, and power consumption, and reduce reliability. This project is to investigate the feasibility of designing advanced microelectronic integrated circuits (ICs) for in situ instruments that can withstand the extreme space environment while maintaining stable and reliable performance without external protection, through the design, fabrication, and testing of an innovative asynchronous A/D converter (ADC) using the cutting-edge IBM 9HP 90nm SiGe BiCMOS process. The novel ADC architecture eliminates temperature dependencies on clock skew, which greatly simplifies data collection from in-situ measurements from different temperature domains. Analysis and optimization for radiation-hardening improves the ADC’s reliability operating in space environments. Leveraging the team’s previous experience in cryogenic temperature analog and digital IC design using the IBM 5AM 0.5μm SiGe process, this more advanced 90nm SiGe semiconductor technology node allows for designing miniaturized, low power, and robust microelectronic circuits. The team consists of researchers from University of Arkansas (UofA) and Ozark Integrated Circuits, Inc.(OzIC). Dr. John Cressler from Georgia Institute of Technology served as a consultant to the team.
•Completed 9HP device modeling for cryogenic temperatures 
•Developed the clockless SAR ADC architecture with specifications and functional simulations
•Developed the radiation hardened asynchronous NULL Convention Logic digital cell library in both schematics and layouts
•Designed the delay elements and delay chains for reliable performance over temperature
•Designed the switch-capacitor matrix and optimized for area
•Designed the comparator and optimized for reliability over temperature and performance
•Designed the asynchronous digital finite state machine
•Performed thorough radiation effect analysis for all circuits developed and optimized the analyzed circuits for improved radiation hardness
•Integrated the ADC schematic and verified over temperature
•Performed the layout of ADC and PEX simulation
•Integrated and taped out the test chip 
•Fabricated chip testing and result analysis