Skip Navigation
Center Independent Research & Development: GSFC IRAD

High-Rate Data Recorder

Completed Technology Project
700 views

Project Description

FPGA, USB3.0, & e.MMC

Design a low cost, compact, solid-state data recorder for suborbital vehicles.   The recorder will have a 45 GB minimum capacity and a record rate of at least 400 Mbps. Cost for recurring units will be nearly an eighth of the cost of commercial units with similar capabilities.

The circuit board central to this design will take in data from a bus that it masters. That bus will be parallel and likely implemented using a stack through connector. The board will packetize the data. It will then tag it with time and an indication of the device that sourced it. The board will also require a port for configuration and diagnostics amd may require an additional port to read the memory. The board will also have an interface for time stamping. That interface would be either IRIGB or GPS. If GPS is used, the data could eventually be tagged with position as well, but the position feature is not covered by this proposal.

The backplane bus when initialized will wait for one or more external interface cards to request a time slice of bus access. The mainboard will acknowledge the highest priority interface card thereby allowing it to record at least one frame of tagged data before acknowledging the next interface. An additional future enhancement could allow multiple slower devices to record at the same time by splitting the backplane data path.

More »

Anticipated Benefits

Project Library

Primary U.S. Work Locations and Key Partners

Technology Transitions

Light bulb

Suggest an Edit

Recommend changes and additions to this project record.
^