This effort seeks to develop a rad-hard CAN-to-I2C/SPI (Controller-Area Network to Inter-Integrated Circuit and Serial Peripheral Interface) ASIC for efficient and robust communication in miniaturized instruments and small spacecraft. NASA has been relying on serial interfaces such as I2C and SPI which provide simple solutions at the component and sub-system level, however, their limited expandability and lack of error detection lead to problems when used for complex system and spacecraft level communications which are only found in integration with limited time and options to address them. The CAN-to-I2C/SPI ASIC seeks to enable full CAN-based systems where I2C and SPI devices are isolated using the converter, increasing efficiency by reducing the number and type of interface and reliability by improving expandability and robustness. The main objective is to design a prototype for a radiation hardened low-power CAN-to-I2C/SPI ASIC that will enable full CAN bus for future small satellites and CubeSats. The proposed device will improve efficiency and robustness of communication busses by isolating I2C and SPI components at the subsystem level. The proposed development includes coding in HDL (high level design language, e.g. Verilog) a CAN controller and I2C/SPI masters with interface logic, and prototyping in a low-cost FPGA development board. A path to silicon will be evaluated after the design is proven in the FPGA platform.
More »The ASIC reduces complexity and increases efficiency by reducing the number and type of interfaces, design time and system level problems in particular those associated with I2C. For small satellites, it will do so by enabling a single CAN-based system bus where I2C, SPI and UART sub-systems or peripherals are isolated and interfaced using the proposed device.
More »Organizations Performing Work | Role | Type | Location |
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Goddard Space Flight Center (GSFC) | Lead Organization | NASA Center | Greenbelt, Maryland |