Typical existing infrared (IR) focal plane arrays (FPAs) have high spatial resolution over large areas due to their high pixel counts, however they can only continuously operate at frame rates below 50 kfps. Such FPAs could be redesigned to achieve MHz frame rates by redesigning the read-out integrated circuit (ROIC) and reducing the format. By reducing the pixel count and increasing the pixel size, and by increasing the degree of parallel access to pixels, a high speed data link can be established for every pixel, allowing continuous operation at frame rates up to 1 MHz. A proof of concept architecture in the LWIR band has been demonstrated with off-chip room temperature read out electronics of 8x8 format. In this proposed effort, we will improve upon this design by demonstrating it for a larger format and a different IR band, and by increasing the signal to noise in the read-out electronics. In pursuing this path, we expect to establish in a Phase II effort a foundation for redesigning the traditional IR FPA, focusing on the ROIC.