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SBIR/STTR

Domain Specific Language for Geant4 Parallelization for Space-based Applications, Phase I

Completed Technology Project

Project Introduction

A major limiting factor in HPC growth is the requirement to parallelize codes to leverage emerging architectures, especially as single core performance has plateaued and architectures like short vector units (e.g., AVX), Intel Xeon Phi, and GPUs are embraced by hardware manufactures. The proposed SIMD/SIMT vectorization tools for emerging accelerator-based compute architectures will impact a world-wide range of academic, government, and commercial researchers. The Geant4 toolkit enables the simulations of the passage of particles through matter. As with many scientific codes, it was originally developed for single processor compute nodes using compute clusters, and has not been optimized for SIMD/SIMT architectures (e.g., many-core nodes, GPUs, short vector units, and other Application Processing Units, e.g., Intel Xeon Phi. Therefore, optimizations and code rewrites are required to target each new architecture. This project will develop two tools to aid in the parallelization of compute applications for SIMD/SIMT architectures. The first tool will perform a dynamic analysis to determine the potential to extract SIMD/SIMT parallelization from an application. The second tool will be a Domain Specific Language (DSL) designed to aid in the SIMDization of control dependent application components. The DSL compiler will automatically generate a SIMD/SIMT optimized code version targeted at the compute architecture of interest (e.g., GPU, SIMD Vector Units like AVX, or Intel Xeon Phi). Initial development and experiments will be developed for Geant4. More »

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