Skip Navigation
Center Independent Research & Development: JPL IRAD

Low Power Reconfigurable FPGA Transponder

Active Technology Project

Project Introduction

Low Power Reconfigurable FPGA Transponder

This task will develop a prototype flight transponder based on low power FPGAs capable of implementing existing Electra, CoNNECT, UST, and Iris waveforms.

Under this initiative, a prototype Ka-Band exciter and receiver are under development; suitable FPGAs that are lower power than the Virtex 5 but still compatible with a deep space environment are being surveyed with a goal of a lower power Iris V2 implementation; and a trade study is being conducted to determine under what conditions a CPU is needed and what software would run on it.

More »

Anticipated Benefits

Primary U.S. Work Locations and Key Partners

Project Library

Share this Project

Organizational Responsibility

Project Management

Project Duration

Technology Maturity (TRL)

Technology Areas

Light bulb

Suggest an Edit

Recommend changes and additions to this project record.
^