This task will develop a prototype flight transponder based on low power FPGAs capable of implementing existing Electra, CoNNECT, UST, and Iris waveforms.
Under this initiative, a prototype Ka-Band exciter and receiver are under development; suitable FPGAs that are lower power than the Virtex 5 but still compatible with a deep space environment are being surveyed with a goal of a lower power Iris V2 implementation; and a trade study is being conducted to determine under what conditions a CPU is needed and what software would run on it.
More »Increased science return
Increased competitiveness and data return for smallsats
Increased data return for smallsats
More »Organizations Performing Work | Role | Type | Location |
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Jet Propulsion Laboratory (JPL) | Lead Organization | FFRDC/UARC | Pasadena, California |