The NASA SBIR and STTR programs fund the research, development, and demonstration of innovative technologies that fulfill NASA needs as described in the annual Solicitations and have significant potential for successful commercialization. If you are a small business concern (SBC) with 500 or fewer employees or a non-profit RI such as a university or a research laboratory with ties to an SBC, then NASA encourages you to learn more about the SBIR and STTR programs as a potential source of seed funding for the development of your innovations.
The SBIR and STTR programs have 3 phases:
The SBIR and STTR Phase I contracts last for 6 months with a maximum funding of $125,000, and Phase II contracts last for 24 months with a maximum funding of $750,000 - $1.5 million.
Opportunity for Continued Technology Development Post-Phase II:
The NASA SBIR/STTR Program currently has in place two initiatives for supporting its small business partners past the basic Phase I and Phase II elements of the program that emphasize opportunities for commercialization. Specifically, the NASA SBIR/STTR Program has the Phase II Enhancement (Phase II-E) and Phase II eXpanded (Phase II-X) contract options.
Please review the links below to obtain more information on the SBIR/STTR programs.
Provides an overview of the SBIR and STTR programs as implemented by NASA
Provides access to the annual SBIR/STTR Solicitations containing detailed information on the program eligibility requirements, proposal instructions and research topics and subtopics
Schedule and links for the SBIR/STTR solicitations and selection announcements
Federal and non-Federal sources of assistance for small business
Search our complete archive of awarded project abstracts to learn about what NASA has funded
Still have questions? Visit the program FAQs
","parentProgram":{"ableToSelect":false,"isActive":true,"description":"Catalyst is a portfolio of early stage programs that specialize in different innovation constituencies and mechanisms to push the state of the art in aerospace technology development","programId":92327,"responsibleMd":{"canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":""},"title":"Catalyst","manageGaps":false,"acronymOrTitle":"Catalyst"},"parentProgramId":92327,"programId":73,"responsibleMd":{"organizationId":4875,"organizationName":"Space Technology Mission Directorate","acronym":"STMD","organizationType":"NASA_Mission_Directorate","canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":"NASA Mission Directorate"},"responsibleMdOffice":4875,"stockImageFileId":36648,"title":"Small Business Innovation Research/Small Business Tech Transfer","manageGaps":false,"acronymOrTitle":"SBIR/STTR"},"description":"The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (the ?memory wall?) and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar). 3D ICs, after a long wait, is now a reality. The first mainstream product is 3D memory cubes, where multiple memory tiers (4 DRAM tiers as of 2015) are vertically integrated to offer manifold improvement in size, capacity, speed, and power consumption compared with 2D counterparts. Indeed, these are the memory parts that will truly enable aforementioned missions. Unfortunately, none of these are ready for space. The purpose of this research is to investigate the challenges and opportunities in deploying 3D memory cubes into space missions.","benefits":"In order to effectively address the SWaP constraints of space hardware, it is desired to compact the electronics to as small a size as possible. Advances in the arena of 3D stacking and 3D ICs have opened a window of opportunity to integrate these types of packaging for space applications. Very high density, high bandwidth, RAD-hard reliable memory cubes would address some of the immediate needs for space applications. The one drawback is the ready availability of this type of space qualified 3D hardware. The proposed 3D RAD-hard memory stack will be directly applicable to space electronics requiring memory intensive applications. The technology derived from this study will allow NASA to utilize this on a broader range of capabilities that can be brought to space.The NASA SBIR and STTR programs fund the research, development, and demonstration of innovative technologies that fulfill NASA needs as described in the annual Solicitations and have significant potential for successful commercialization. If you are a small business concern (SBC) with 500 or fewer employees or a non-profit RI such as a university or a research laboratory with ties to an SBC, then NASA encourages you to learn more about the SBIR and STTR programs as a potential source of seed funding for the development of your innovations.
The SBIR and STTR programs have 3 phases:
The SBIR and STTR Phase I contracts last for 6 months with a maximum funding of $125,000, and Phase II contracts last for 24 months with a maximum funding of $750,000 - $1.5 million.
Opportunity for Continued Technology Development Post-Phase II:
The NASA SBIR/STTR Program currently has in place two initiatives for supporting its small business partners past the basic Phase I and Phase II elements of the program that emphasize opportunities for commercialization. Specifically, the NASA SBIR/STTR Program has the Phase II Enhancement (Phase II-E) and Phase II eXpanded (Phase II-X) contract options.
Please review the links below to obtain more information on the SBIR/STTR programs.
Provides an overview of the SBIR and STTR programs as implemented by NASA
Provides access to the annual SBIR/STTR Solicitations containing detailed information on the program eligibility requirements, proposal instructions and research topics and subtopics
Schedule and links for the SBIR/STTR solicitations and selection announcements
Federal and non-Federal sources of assistance for small business
Search our complete archive of awarded project abstracts to learn about what NASA has funded
Still have questions? Visit the program FAQs
","parentProgram":{"ableToSelect":false,"isActive":true,"description":"Catalyst is a portfolio of early stage programs that specialize in different innovation constituencies and mechanisms to push the state of the art in aerospace technology development","programId":92327,"responsibleMd":{"canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":""},"title":"Catalyst","manageGaps":false,"acronymOrTitle":"Catalyst"},"parentProgramId":92327,"programId":73,"responsibleMd":{"organizationId":4875,"organizationName":"Space Technology Mission Directorate","acronym":"STMD","organizationType":"NASA_Mission_Directorate","canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":"NASA Mission Directorate"},"responsibleMdOffice":4875,"stockImageFileId":36648,"title":"Small Business Innovation Research/Small Business Tech Transfer","manageGaps":false,"acronymOrTitle":"SBIR/STTR"},"description":"The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (the ?memory wall?) and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar). 3D ICs, after a long wait, is now a reality. The first mainstream product is 3D memory cubes, where multiple memory tiers (4 DRAM tiers as of 2015) are vertically integrated to offer manifold improvement in size, capacity, speed, and power consumption compared with 2D counterparts. Indeed, these are the memory parts that will truly enable aforementioned missions. Unfortunately, none of these are ready for space. The purpose of this research is to investigate the challenges and opportunities in deploying 3D memory cubes into space missions.","benefits":"In order to effectively address the SWaP constraints of space hardware, it is desired to compact the electronics to as small a size as possible. Advances in the arena of 3D stacking and 3D ICs have opened a window of opportunity to integrate these types of packaging for space applications. Very high density, high bandwidth, RAD-hard reliable memory cubes would address some of the immediate needs for space applications. The one drawback is the ready availability of this type of space qualified 3D hardware. The proposed 3D RAD-hard memory stack will be directly applicable to space electronics requiring memory intensive applications. The technology derived from this study will allow NASA to utilize this on a broader range of capabilities that can be brought to space.The NASA SBIR and STTR programs fund the research, development, and demonstration of innovative technologies that fulfill NASA needs as described in the annual Solicitations and have significant potential for successful commercialization. If you are a small business concern (SBC) with 500 or fewer employees or a non-profit RI such as a university or a research laboratory with ties to an SBC, then NASA encourages you to learn more about the SBIR and STTR programs as a potential source of seed funding for the development of your innovations.
The SBIR and STTR programs have 3 phases:
The SBIR and STTR Phase I contracts last for 6 months with a maximum funding of $125,000, and Phase II contracts last for 24 months with a maximum funding of $750,000 - $1.5 million.
Opportunity for Continued Technology Development Post-Phase II:
The NASA SBIR/STTR Program currently has in place two initiatives for supporting its small business partners past the basic Phase I and Phase II elements of the program that emphasize opportunities for commercialization. Specifically, the NASA SBIR/STTR Program has the Phase II Enhancement (Phase II-E) and Phase II eXpanded (Phase II-X) contract options.
Please review the links below to obtain more information on the SBIR/STTR programs.
Provides an overview of the SBIR and STTR programs as implemented by NASA
Provides access to the annual SBIR/STTR Solicitations containing detailed information on the program eligibility requirements, proposal instructions and research topics and subtopics
Schedule and links for the SBIR/STTR solicitations and selection announcements
Federal and non-Federal sources of assistance for small business
Search our complete archive of awarded project abstracts to learn about what NASA has funded
Still have questions? Visit the program FAQs
","parentProgram":{"ableToSelect":false,"isActive":true,"description":"Catalyst is a portfolio of early stage programs that specialize in different innovation constituencies and mechanisms to push the state of the art in aerospace technology development","programId":92327,"responsibleMd":{"canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":""},"title":"Catalyst","manageGaps":false,"acronymOrTitle":"Catalyst"},"parentProgramId":92327,"programId":73,"responsibleMd":{"organizationId":4875,"organizationName":"Space Technology Mission Directorate","acronym":"STMD","organizationType":"NASA_Mission_Directorate","canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":"NASA Mission Directorate"},"responsibleMdOffice":4875,"stockImageFileId":36648,"title":"Small Business Innovation Research/Small Business Tech Transfer","manageGaps":false,"acronymOrTitle":"SBIR/STTR"},"description":"The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (the memory wall) and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar). 3D ICs, after a long wait, is now a reality. The first mainstream product is 3D memory cubes, where multiple memory tiers (4 DRAM tiers as of 2015) are vertically integrated to offer manifold improvement in size, capacity, speed, and power consumption compared with 2D counterparts. Indeed, these are the memory parts that will truly enable aforementioned missions. Unfortunately, none of these are ready for space. The purpose of this research is to investigate the challenges and opportunities in deploying 3D memory cubes into space missions.","benefits":"In order to effectively address the SWaP constraints of space hardware, it is desired to compact the electronics to as small a size as possible. Advances in the arena of 3D stacking and 3D ICs have opened a window of opportunity to integrate these types of packaging for space applications. Very high density, high bandwidth, RAD-hard reliable memory cubes would address some of the immediate needs for space applications. The one drawback is the ready availability of this type of space qualified 3D hardware. The proposed 3D RAD-hard memory stack will be directly applicable to space electronics requiring memory intensive applications. The technology derived from this study will allow NASA to utilize this on a broader range of capabilities that can be brought to space.The NASA SBIR and STTR programs fund the research, development, and demonstration of innovative technologies that fulfill NASA needs as described in the annual Solicitations and have significant potential for successful commercialization. If you are a small business concern (SBC) with 500 or fewer employees or a non-profit RI such as a university or a research laboratory with ties to an SBC, then NASA encourages you to learn more about the SBIR and STTR programs as a potential source of seed funding for the development of your innovations.
The SBIR and STTR programs have 3 phases:
The SBIR and STTR Phase I contracts last for 6 months with a maximum funding of $125,000, and Phase II contracts last for 24 months with a maximum funding of $750,000 - $1.5 million.
Opportunity for Continued Technology Development Post-Phase II:
The NASA SBIR/STTR Program currently has in place two initiatives for supporting its small business partners past the basic Phase I and Phase II elements of the program that emphasize opportunities for commercialization. Specifically, the NASA SBIR/STTR Program has the Phase II Enhancement (Phase II-E) and Phase II eXpanded (Phase II-X) contract options.
Please review the links below to obtain more information on the SBIR/STTR programs.
Provides an overview of the SBIR and STTR programs as implemented by NASA
Provides access to the annual SBIR/STTR Solicitations containing detailed information on the program eligibility requirements, proposal instructions and research topics and subtopics
Schedule and links for the SBIR/STTR solicitations and selection announcements
Federal and non-Federal sources of assistance for small business
Search our complete archive of awarded project abstracts to learn about what NASA has funded
Still have questions? Visit the program FAQs
","parentProgram":{"ableToSelect":false,"isActive":true,"description":"Catalyst is a portfolio of early stage programs that specialize in different innovation constituencies and mechanisms to push the state of the art in aerospace technology development","programId":92327,"responsibleMd":{"canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":""},"title":"Catalyst","manageGaps":false,"acronymOrTitle":"Catalyst"},"parentProgramId":92327,"programId":73,"responsibleMd":{"organizationId":4875,"organizationName":"Space Technology Mission Directorate","acronym":"STMD","organizationType":"NASA_Mission_Directorate","canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":"NASA Mission Directorate"},"responsibleMdOffice":4875,"stockImageFileId":36648,"title":"Small Business Innovation Research/Small Business Tech Transfer","manageGaps":false,"acronymOrTitle":"SBIR/STTR"},"description":"The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (the ?memory wall?) and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar). 3D ICs, after a long wait, is now a reality. The first mainstream product is 3D memory cubes, where multiple memory tiers (4 DRAM tiers as of 2015) are vertically integrated to offer manifold improvement in size, capacity, speed, and power consumption compared with 2D counterparts. Indeed, these are the memory parts that will truly enable aforementioned missions. Unfortunately, none of these are ready for space. The purpose of this research is to investigate the challenges and opportunities in deploying 3D memory cubes into space missions.","benefits":"In order to effectively address the SWaP constraints of space hardware, it is desired to compact the electronics to as small a size as possible. Advances in the arena of 3D stacking and 3D ICs have opened a window of opportunity to integrate these types of packaging for space applications. Very high density, high bandwidth, RAD-hard reliable memory cubes would address some of the immediate needs for space applications. The one drawback is the ready availability of this type of space qualified 3D hardware. The proposed 3D RAD-hard memory stack will be directly applicable to space electronics requiring memory intensive applications. The technology derived from this study will allow NASA to utilize this on a broader range of capabilities that can be brought to space.The NASA SBIR and STTR programs fund the research, development, and demonstration of innovative technologies that fulfill NASA needs as described in the annual Solicitations and have significant potential for successful commercialization. If you are a small business concern (SBC) with 500 or fewer employees or a non-profit RI such as a university or a research laboratory with ties to an SBC, then NASA encourages you to learn more about the SBIR and STTR programs as a potential source of seed funding for the development of your innovations.
The SBIR and STTR programs have 3 phases:
The SBIR and STTR Phase I contracts last for 6 months with a maximum funding of $125,000, and Phase II contracts last for 24 months with a maximum funding of $750,000 - $1.5 million.
Opportunity for Continued Technology Development Post-Phase II:
The NASA SBIR/STTR Program currently has in place two initiatives for supporting its small business partners past the basic Phase I and Phase II elements of the program that emphasize opportunities for commercialization. Specifically, the NASA SBIR/STTR Program has the Phase II Enhancement (Phase II-E) and Phase II eXpanded (Phase II-X) contract options.
Please review the links below to obtain more information on the SBIR/STTR programs.
Provides an overview of the SBIR and STTR programs as implemented by NASA
Provides access to the annual SBIR/STTR Solicitations containing detailed information on the program eligibility requirements, proposal instructions and research topics and subtopics
Schedule and links for the SBIR/STTR solicitations and selection announcements
Federal and non-Federal sources of assistance for small business
Search our complete archive of awarded project abstracts to learn about what NASA has funded
Still have questions? Visit the program FAQs
","parentProgram":{"ableToSelect":false,"isActive":true,"description":"Catalyst is a portfolio of early stage programs that specialize in different innovation constituencies and mechanisms to push the state of the art in aerospace technology development","programId":92327,"responsibleMd":{"canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":""},"title":"Catalyst","manageGaps":false,"acronymOrTitle":"Catalyst"},"parentProgramId":92327,"programId":73,"responsibleMd":{"organizationId":4875,"organizationName":"Space Technology Mission Directorate","acronym":"STMD","organizationType":"NASA_Mission_Directorate","canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":"NASA Mission Directorate"},"responsibleMdOffice":4875,"stockImageFileId":36648,"title":"Small Business Innovation Research/Small Business Tech Transfer","manageGaps":false,"acronymOrTitle":"SBIR/STTR"},"description":"The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (the ?memory wall?) and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar). 3D ICs, after a long wait, is now a reality. The first mainstream product is 3D memory cubes, where multiple memory tiers (4 DRAM tiers as of 2015) are vertically integrated to offer manifold improvement in size, capacity, speed, and power consumption compared with 2D counterparts. Indeed, these are the memory parts that will truly enable aforementioned missions. Unfortunately, none of these are ready for space. The purpose of this research is to investigate the challenges and opportunities in deploying 3D memory cubes into space missions.","benefits":"In order to effectively address the SWaP constraints of space hardware, it is desired to compact the electronics to as small a size as possible. Advances in the arena of 3D stacking and 3D ICs have opened a window of opportunity to integrate these types of packaging for space applications. Very high density, high bandwidth, RAD-hard reliable memory cubes would address some of the immediate needs for space applications. The one drawback is the ready availability of this type of space qualified 3D hardware. The proposed 3D RAD-hard memory stack will be directly applicable to space electronics requiring memory intensive applications. The technology derived from this study will allow NASA to utilize this on a broader range of capabilities that can be brought to space.The NASA SBIR and STTR programs fund the research, development, and demonstration of innovative technologies that fulfill NASA needs as described in the annual Solicitations and have significant potential for successful commercialization. If you are a small business concern (SBC) with 500 or fewer employees or a non-profit RI such as a university or a research laboratory with ties to an SBC, then NASA encourages you to learn more about the SBIR and STTR programs as a potential source of seed funding for the development of your innovations.
The SBIR and STTR programs have 3 phases:
The SBIR and STTR Phase I contracts last for 6 months with a maximum funding of $125,000, and Phase II contracts last for 24 months with a maximum funding of $750,000 - $1.5 million.
Opportunity for Continued Technology Development Post-Phase II:
The NASA SBIR/STTR Program currently has in place two initiatives for supporting its small business partners past the basic Phase I and Phase II elements of the program that emphasize opportunities for commercialization. Specifically, the NASA SBIR/STTR Program has the Phase II Enhancement (Phase II-E) and Phase II eXpanded (Phase II-X) contract options.
Please review the links below to obtain more information on the SBIR/STTR programs.
Provides an overview of the SBIR and STTR programs as implemented by NASA
Provides access to the annual SBIR/STTR Solicitations containing detailed information on the program eligibility requirements, proposal instructions and research topics and subtopics
Schedule and links for the SBIR/STTR solicitations and selection announcements
Federal and non-Federal sources of assistance for small business
Search our complete archive of awarded project abstracts to learn about what NASA has funded
Still have questions? Visit the program FAQs
","parentProgram":{"ableToSelect":false,"isActive":true,"description":"Catalyst is a portfolio of early stage programs that specialize in different innovation constituencies and mechanisms to push the state of the art in aerospace technology development","programId":92327,"responsibleMd":{"canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":""},"title":"Catalyst","manageGaps":false,"acronymOrTitle":"Catalyst"},"parentProgramId":92327,"programId":73,"responsibleMd":{"organizationId":4875,"organizationName":"Space Technology Mission Directorate","acronym":"STMD","organizationType":"NASA_Mission_Directorate","canUserEdit":false,"locationEdit":false,"organizationRolePretty":"","organizationTypePretty":"NASA Mission Directorate"},"responsibleMdOffice":4875,"stockImageFileId":36648,"title":"Small Business Innovation Research/Small Business Tech Transfer","manageGaps":false,"acronymOrTitle":"SBIR/STTR"},"description":"The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft CPUs, they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (the memory wall) and provide rapid access to observational data captured by high-data-rate instruments (e.g., Hyperspectral Infrared Imager, Interferometric Synthetic Aperture Radar). 3D ICs, after a long wait, is now a reality. The first mainstream product is 3D memory cubes, where multiple memory tiers (4 DRAM tiers as of 2015) are vertically integrated to offer manifold improvement in size, capacity, speed, and power consumption compared with 2D counterparts. Indeed, these are the memory parts that will truly enable aforementioned missions. Unfortunately, none of these are ready for space. The purpose of this research is to investigate the challenges and opportunities in deploying 3D memory cubes into space missions.","benefits":"In order to effectively address the SWaP constraints of space hardware, it is desired to compact the electronics to as small a size as possible. Advances in the arena of 3D stacking and 3D ICs have opened a window of opportunity to integrate these types of packaging for space applications. Very high density, high bandwidth, RAD-hard reliable memory cubes would address some of the immediate needs for space applications. The one drawback is the ready availability of this type of space qualified 3D hardware. The proposed 3D RAD-hard memory stack will be directly applicable to space electronics requiring memory intensive applications. The technology derived from this study will allow NASA to utilize this on a broader range of capabilities that can be brought to space.